CS274: Computer Architecture - From MIPS to Machine Language
Activity Goals
The goals of this activity are:
- To translate between MIPS assembly instructions and MIPS 32-bit machine language
- To explain that all MIPS assembly instructions are 32 bits in size, regardless of format
Supplemental Reading
Feel free to visit these resources for supplemental background reading material.
The Activity
Directions
Consider the activity models and answer the questions provided. First reflect on these questions on your own briefly, before discussing and comparing your thoughts with your group. Appoint one member of your group to discuss your findings with the class, and the rest of the group should help that member prepare their response. Answer each question individually from the activity, and compare with your group to prepare for our whole-class discussion. After class, think about the questions in the reflective prompt and respond to those individually in your notebook. Report out on areas of disagreement or items for which you and your group identified alternative approaches. Write down and report out questions you encountered along the way for group discussion.
Model 1: Instruction Formats
R Type |
opcode |
rs |
rt |
rd |
shamt |
function |
bits |
6 |
5 |
5 |
5 |
5 |
6 |
add $t0, $t1, $t2 |
0 |
$t1 = 9 |
$t2 = 10 |
$t0 = 8 |
0 |
0x20 |
|
|
|
|
|
|
|
I Type |
opcode |
rs |
rt |
immediate |
bits |
6 |
5 |
5 |
16 |
addi $s0, $s1, 100 |
0x8 |
$s1 = 17 |
$s0 = 16 |
100 |
|
|
|
|
|
|
|
J type |
opcode |
jump-address |
bits |
6 |
26 |
j loop |
0x2 |
10010001101 |
assuming the address of loop is 0x80001234 (0b10000000000000000001001000110100) |
and PC+4 is 0x80000000 |
Questions
- A jump instruction allows 26 bits for the jump address, but addresses are 32 bits in length. Why can't we allow a 32-bit jump address in an instruction, and what do you think is done instead?
- Why are all addresses and instructions 32 bits in size?
- Where is the "answer" register (
rd
in an R type instruction, and rt
in an I type instruction) typically found in a MIPS assembly instruction, and where is it typically found in the machine code translation?
- The
shamt
field holds the number of bits that a register shifts left or right. In your MIPS reference sheet, look up what instruction would consist of all 0 bits. What might you call this instruction, and what does it do?
- How can you tell if an instruction is R type or not? If it is not R type, how can you tell if it is J type or I type?
- Why do you think the designers stopped at only 3 instruction formats?
- Translate the instruction
addi $t1, $t2, $t3
to a MIPS 32 bit machine instruction.
- Translate the 32 bit instruction 0x00571020 from hexidecimal to binary, and then to a MIPS assembly instruction. How can you tell just by looking at the hexidecimal that it's an R-type instruction?
- What instructions might implement the pseudoinstruction li $t0, 0xabcd5678? Why can't this instruction be represented with a single operation?
Model 2: Translating jump instructions
Questions
- What do you think this program does?
- Suppose the first line of
main
is instruction address 0x00400024
. What is the address of the first instruction at label procedure
? What is the binary translation of the jal
instruction above?
Submission
I encourage you to submit your answers to the questions (and ask your own questions!) using the Class Activity Questions discussion board. You may also respond to questions or comments made by others, or ask follow-up questions there. Answer any reflective prompt questions in the Reflective Journal section of your OneNote Classroom personal section. You can find the link to the class notebook on the syllabus.