CS274: Computer Architecture - 4 Bit ALU Design (100 Points)

Assignment Goals

The goals of this assignment are:
  1. To connect individual ALU designs into a multi-bit ALU

Background Reading and References

Please refer to the following readings and examples offering templates to help get you started:

The Assignment

What to Do

Draw the Circuit Diagram for a 4-bit ALU

Draw a circuit diagram schematic for a 4-bit ALU using boolean logic gates and the below diagram of a 1-bit ALU. Specifically, accept as inputs a 4-bit input A and a 4-bit input B, as well as an Op operation code, and connect the individual 1-bit ALU’s to one another to produce a 4-bit output result, a 1-bit output zero, a 1-bit output CarryOut, and a 1-bit output overflow.

1 bit ALU

Synthesis of a 4-bit ALU in VHDL

In this lab, you will create and test a 4-bit ALU using a structural design in VHDL. The port definition is provided for you:

entity ALU4 is
port(a,b             : in std_logic_vector (3 downto 0);
     ALUOp           : in std_logic_vector (1 downto 0);
     result          : out std_logic_vector (3 downto 0);
     CarryOut        : out std_logic;
     overflow        : out std_logic);
end ALU4;

You can write four port maps to 1-bit ALU components to do this, but you could also instantiate multiple structural wirings using a for...generate loop that you may wish to consider:

alugen: for i in 3 downto 0 generate
   alu: alu1 PORT MAP(x => a(i), ...);
end generate alugen;

I recommend creating a std_logic_vector(3 downto 0) signal called results that you wire each of your individual 1-bit ALU results to. You can then add a behavioral line to connect the result to the result output pin:

result <= results;

For the 1-bit ALU port maps, you should wire:

  1. Each bit of a and b to each 1-bit ALU
  2. The ALUOp port to all of the 1-bit ALUs

Modifications for Essential Features

When finished with this base design, make the following three modifications. For your carry bits, create a std_logic_vector(4 downto 0) signal called carries, and use these to pass the carry out of each 1-bit ALU to the carry in of the next.

Modification 1: Subtraction

Add a bInvert pin, and wire it to the bInvert input of all of your 1-bit ALUs, and wire it to the least significant ALU carryIn bit (you can replace the carrys(0) input which is not used).

Modification 2: Overflow Detection

Add an ovf overflow signal that is equal to the carryIn xor carryOut of the most significant ALU. Add an overflow pin to your 4-bit ALU, and set overflow to ovf just like you did with the result signal above.

Modification 3: less than status bit

Add a less than output pin that is the most significant results bit xor the ovf detection signal.

Extra Credit (20%): Zero Flag

Create a zero flag pin for your 4-bit ALU as follows:

zero : out std_logic;

Create and use a 4-bit or gate, and a not gate, to bitwise or together all four bits of your results signal, and invert that. Your inverted output writes to the zero flag.

Submission

In your submission, please include answers to any questions asked on the assignment page in your README file. If you wrote code as part of this assignment, please describe your design, approach, and implementation in your README file as well. Finally, include answers to the following questions:
  • Describe what you did, how you did it, what challenges you encountered, and how you solved them.
  • Please answer any questions found throughout the narrative of this assignment.
  • If collaboration with a buddy was permitted, did you work with a buddy on this assignment? If so, who? If not, do you certify that this submission represents your own original work?
  • Please identify any and all portions of your submission that were not originally written by you (for example, code originally written by your buddy, or anything taken or adapted from a non-classroom resource). It is always OK to use your textbook and instructor notes; however, you are certifying that any portions not designated as coming from an outside person or source are your own original work.
  • Approximately how many hours it took you to finish this assignment (I will not judge you for this at all...I am simply using it to gauge if the assignments are too easy or hard)?
  • Your overall impression of the assignment. Did you love it, hate it, or were you neutral? One word answers are fine, but if you have any suggestions for the future let me know.
  • Using the grading specifications on this page, discuss briefly the grade you would give yourself and why. Discuss each item in the grading specification.
  • Any other concerns that you have. For instance, if you have a bug that you were unable to solve but you made progress, write that here. The more you articulate the problem the more partial credit you will receive (it is fine to leave this blank).

Assignment Rubric

Description Pre-Emerging (< 50%) Beginning (50%) Progressing (85%) Proficient (100%)
Algorithm Implementation (60%) The algorithm fails on the test inputs due to major issues, or the program fails to compile and/or run The algorithm fails on the test inputs due to one or more minor issues The algorithm is implemented to solve the problem correctly according to given test inputs, but would fail if executed in a general case due to a minor issue or omission in the algorithm design or implementation A reasonable algorithm is implemented to solve the problem which correctly solves the problem according to the given test inputs, and would be reasonably expected to solve the problem in the general case
Code Quality and Documentation (30%) Code commenting and structure are absent, or code structure departs significantly from best practice, and/or the code departs significantly from the style guide Code commenting and structure is limited in ways that reduce the readability of the program, and/or there are minor departures from the style guide Code documentation is present that re-states the explicit code definitions, and/or code is written that mostly adheres to the style guide Code is documented at non-trivial points in a manner that enhances the readability of the program, and code is written according to the style guide
Writeup and Submission (10%) An incomplete submission is provided The program is submitted, but not according to the directions in one or more ways (for example, because it is lacking a readme writeup) The program is submitted according to the directions with a minor omission or correction needed, and with at least superficial responses to the bolded questions throughout The program is submitted according to the directions, including a readme writeup describing the solution, and thoughtful answers to the bolded questions throughout

Please refer to the Style Guide for code quality examples and guidelines.